A new generation of tools based on SDL combines graphical easy-to-learn management of software with automatic generation of documentation and modifications. The code is optimized for embedded applications and for testing by adding the real-time elements needed for embedded systems. Unlike some other formal languages, SDL has been designed for general, real-time, event-driven applications.
SDL is based on the idea of communication between extended finite-state machines running in parallel. An SDL system consists of four basic elements. Block diagrams show the functional and hierarchical structure of the system. Process diagrams show the dynamic behavior through flow charts. Signal definitions handle the message-passing communication. Data type definitions complete the basic elements.
Processes can be created and terminated dynamically. Each process contains a state machine with an abstract input port that can receive SDL signals through an infinite FIFO queue.
SDL was formalized by the International Telecommunication Union (ITU) as the Z.100 specification. The use of SDL really took off in the early 1990s when telecom standards such as GSM, PCS and Intelligent Networks were specified in SDL. At the same time, Message Sequence Charts (MSC) were introduced as a standard to complement SDL. MSC is a graphical language that can be used in several stages in the development for requirements capture and as a tracing language in simulations. In the later stages, it can help validate and test the system.
Telelogic of Sweden started working with such formal languages when it operated as the research and development arm of Swedish Telecom. Since its commercial independence, starting in 1991 and most recently becoming part of the Saab-Combitech Group in 1995, Telelogic has taken its SDL Development Tool (SDT) to engineers in its market of the world’s major telecommunications operators and researchers and, with some modifications, into the embedded arena.
Telelogic has been working closely with Britain’s BT to write specs for new equipment in SDL rather than on paper. That means equipment vendors can automatically generate code from the specification and test the final code and equipment against the specification.
It also means that BT will be able to simulate the effect of adding the new equipment into its network and reduce the required integration testing. That becomes increasingly important as BT’s networks grow more complex through its merger with MCI. BT’s need for such a language again arises as software in intelligent networks offers advanced services.
The advantage of the SDL approach is that the formalism of the language makes it easier for tool developers to link to other technologies like TTCN (Tree and Tabular Combined Notation), an ISO standard. For example, Telelogic’s ITEX tools can automatically gener-ate TTCN test suites for the integrated software and hardware from an SDL specification.
SDL is gathering a portfolio of successes in the embedded world. For example, Telelogic worked with German software house S&P Media to develop an automatic code generator for embedded systems. Telelogic turned to its SDT Cmicro Package, which is geared to systems with limited memory and low-performance processors. To meet the embedded-memory requirements, the Cmicro package removes the high-end functions of the SDL. The code size is scalable from 1 to 8 kbytes for an 80X86 implementation.
A library for Cmicro is provided as source code for compiling and linking for the application. The code generator produces a header file that controls which functions are necessary for a particular system, and the compiler strips out the unused functions.
For any system, the software has to be finally tested on the target. The SDT Cmicro Tester traces the activity of the system at an SDL level and runs test software simulating both internal and external conditions. It also creates and stores error traces to diagnose problems in field testing by sending information about the execution flow, including the signals sent and received.
Filters can restrict the information to particular process instances or SDL constructs. The Cmicro tracer is integrated with the MSC editor on the host to dynamically show the signals in the same way as the host simulation.